AI Summary
5 min read“We’re Gonna Laugh at How Old-Fashioned AI Was Today”
IMEC’s Steven kicked off the conversation with a striking prediction: in five to ten years, we’ll look back at today’s large language models the way we remember dial-up internet — functional but primitive. The reason, he argued, is that current AI relies on a brute-force approach that will eventually give way to something far more efficient. That prediction frames the entire discussion, which centers on what happens when the physical limits of chip manufacturing collide with exploding demand for AI compute.
What IMEC Actually Does
IMEC is a Belgian research organization that operates a unique clean room facility — one that no other institution in the world has. All the major chip providers come to IMEC first, years before a chip reaches the market, to design the next generation of semiconductors. The process from design to commercial chip takes five to ten years. IMEC has effectively driven the chip roadmap for the last four decades, and Steven noted that “almost no chip in the world today has not been touched by IMEC in some way.”
The End of Moore’s Law as We Knew It
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What you'll learn
- 1 (00:40) **Introducing the Experts and the Core Question** - Hosts introduce Steven from IMEC and Adam from Strike to discuss what comes after the GPU.
- 2 (02:08) **The End of Moore's Law: A Physics Problem** - Steven explains that we are plateauing on the traditional method of making chips faster through scaling.
- 3 (03:10) **Mapping the Chip Bottlenecks for Inference** - Adam identifies the key bottlenecks shifting from training to inference: power, memory, cooling, and data transfer.
- 4 (04:29) **The Shift in Value from Software to Hardware** - The conversation turns to why the hardware market is seeing a renaissance while software faces challenges.
- 5 (06:47) **The Real Bottleneck: Manufacturing Capacity** - The discussion addresses whether there is room for the increasing number of new chip companies.
- 6 (07:49) **What Breaks First as Models Grow?** - The experts identify the primary point of failure in current AI scaling.
- 7 (09:01) **Photonics as the Key Enabling Technology** - The hosts ask about photonics as a replacement for copper in data transfer.
+ Full timestamped outline available in the app
Show Notes
AI's next bottleneck? It might not be GPUs. Memory prices have risen 700% this year, while power, cooling and data transfer are all becoming major constraints on the AI infrastructure buildout. At the same time, the semiconductor industry is approaching the physical limits of simply making transistors smaller.
I sat down with Steven Latré, VP of AI at imec and Thema Board Member, and Adam Chambers of Strike Capital, to talk about what comes after the GPU and where the next wave of value in AI infrastructure could be created.
We get into
› Why memory is already one of AI's biggest bottlenecks
› The power, cooling and data transfer constraints behind inference
› Why photonics could become a critical technology for the next generation of chips
› What happens as Moore's Law approaches the limits of physics
› Why Steven thinks we'll laugh at today's AI in 5–10 years
Steven describes imec as the “hidden gem” of semiconductors. The organization works years ahead of the commercial market, with the world's biggest chip companies coming through its facilities to develop technologies that may not reach the market for another 7–10 years.
His hottest take is that today's LLMs will eventually look like dial-up internet.
“I think we're gonna laugh 5-10 years from now at how old-fashioned AI was today.”
Recorded at the Strike x Sourcery Summit in the South of France.
Steven Latre: https://x.com/slatre
Adam Chambers: https://www.linkedin.com/in/adam-chambers-0b2009274
Molly O’Shea: https://x.com/MollySOShea
Sourcery: https://x.com/sourceryy
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YouTube: https://youtu.be/6-q_8T_m5GM
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